| Design Project data structure |
| Design
Database version
control, archieve and retrive
methodology |
| Circuit simulation automation and scripting: ( Digital and Mixed Signal flow) |
| Design specification, Deliverables Review flow, action tracking, content audit, sign-off procedure and methodology. |
| Convert or migrate a designs in old Cadence database (CDBA) to new Cadence OPEN ACCESS database (somewhat important) |
| Convert or migrate a designs between Cadence and non-Cadence database (less important) |
| PDK data structure, mature status, tagging, version control, update and release methodology |
| GSA_mixed_signal and RF SPICE MODEL checklist |
| PDK elements and package Quality Control flow |
| CAD basic QA cell creation. |
| PDK QA cell list |
| Digital
Library Characterization |
| System and EDA/CAD Software Tool version, configuration and update control |
| Commonly
used EDA/CAD
software evaluation and new version validation. (Perl, tcl, SKILL, python, ruby, SWIG etc basic info) |
| System software, EDA software, and Cadence version compatability matrix |
| Database management software including Cadence design database. |
| IP specification, validation and qualification procedure |
| IP quality status, tagging and Design/IP Database Management |
| IP release and control mechanism |
| IP
creation,
documenetation and Design Project Management |
| Digital library characterization, |
| Evaluation and Implementation of Cadence design database data management (DDM) and current solution available on the market. |
| Analog and Mixed Signal Design flow, requirement and concerns |
| Digital Design Flow, requirement and concerns |
| RF Design Flow, requirement and concerns |
| Final mask pattern generation and Boolean operation validation. |
| RTL to
GDS flow
or (physical implementation) with
Analog and Mixed Signal design block in
mind (new added on Jan 2011) Currently available RTL to GDS tools, flow and solutions provided three major EDA communities. |
| Standardize of software coding, RTL and test bench naming convention and best practice. |
| TSMC
Open Innovation Platform
-> This has very good EDA/PDK/IP related information TSMC Digital Reference Flow 11.0 (released at SAN JOSE, Calif. – June 9, 2010) These are what TSMC Digital Reference Flow 11.0 covered.
Reference Flow 11.0 includes Apache’s recently announced ESD integrity solution, PathFinder. In addition, Apache’s products for power and noise analysis were validated for Reference Flow 11.0 in the areas of System-in-Package (SiP), 3D-IC with Through Silicon Via (TSV), and RTL power estimation:
AMS
Reference Flow 1.0 includes Apache’s Totem platform, a power,
noise, and reliability solution for analog, mixed-signal, memory, and
high-speed I/O designs. In the Reference Flow, Totem is selected for
early power/ground (P/G) grid integrity check, static and dynamic IR
drop signoff, electro-migration (EM) validation, and chip power model
(CPM™) generation of full custom designs.
|
Is
the user group well defined and informed?
If you're getting ready to undergo an integration project of any size,
hopefully you've already thoroughly defined your user group and their
specific requirements. Having an organized user base to share
experiences, good practices, tips and tricks is invaluable in
increasing the ROI of the project.
Is
the solution scalable?
Replacing point-to-point interfaces with a tool becomes senseless if
the tool can only easily manage a small percentage of those interfaces.
It is critical to understand all of the actors within the scope of your
solution.
Does
the solution impact performance?
The tool must have a high throughput of data, and, at the very least,
must provide users with the same level of performance as they have
today. The coolest tool will be dead in a week if a user spends too
much time sitting and tapping his fingers while waiting to access his
files.
Does
security meet company standards?
Support for various security standards is required. Make sure your
solution does not break any standards. And if your solution requires
new technology and/or the adoption of new standards, make sure your
plan includes your company's formal review process.
Is
deployment relatively easy?
The ability to fine tune the system or change certain parameters is
essential. Make sure that when you design your solution, you keep in
mind that someone has to actually install and test the thing. Adhere as
best you can to common practices and protocols.
Is
administration straightforward and centralized?
Ideally, interfaces must be able to be administered automatically and
from a central place. Think about how users will be added and removed
from the system, and where errors and acknowledgements will be tracked.
Does
the solution include user training?
The better the training program, the quicker the enterprise will
realize its return on investment. If you document the solution as you
go, this process will be much easier.
Is
the proper support in place?
A good, tiered support function (offering up to 24/7 telephone support
and a knowledge base of Frequently Asked Questions) will help alleviate
the inevitable problems that come with integration efforts. The best
thing is to be prepared.